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Course Co-ordinated by
IIT Kharagpur
NPTEL
>>
Courses
>>
Computer Science and Engineering
>> High Performance Computer Architecture (Video) >>
Introduction & Course Outline
Question in Lecture
High Performance Computer Architecture
Introduction & Course Outline
Performance
Instruction Set Architecture
MIPS ISA and Processor
MIPS ISA and Processor (Contd.)
Pipelining - Introduction
Instruction Pipelining
Pipeline Hazards
Data Hazards
Software Pipelining
In Quest of Higher ILP
In Quest of Higher ILP (Contd.)
Dynamic Instruction Scheduling
Dynamic Instruction Scheduling (Contd.)
Control Hazards
Branch Prediction
Branch Prediction (Contd.)
Dynamic Instruction Scheduling with Branch Prediction
Hardware-based Speculation
Tutorial - I
Hierarchical Memory Organization
Hierarchical Memory Organization (Contd...1)
Hierarchical Memory Organization (Contd...2)
Hierarchical Memory Organization (Contd...3)
Cache Optimization Techniques (Contd...1)
Cache Optimization Techniques (Contd...2)
Main Memory Organization
Main Memory Optimizations
Virtual Memory
Virtual Memory (Contd.)
Virtual Machines
Storage Technology
Storage Technology (Contd.)
Case Studies
Case Studies (Contd...1)
Case Studies (Contd...2)
Multithreading & Multiprocessing
Simultaneous Multithreading
Symmetric Multiprocessors
Distributed Memory Multiprocessors
Cluster, Grid and Cloud Computing
Ask a Question
Question Topics :
Question:
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NOTE: Before you post question check if your question already exists.Please do not repeat questions.
All Questions
Question:
sir , can you explain the difference between latch and buffer?what does it mean by buffering and latching data?
By:
Rahul R Nair
Date:
2012-11-26
The co-ordinator will post his answer
Question:
sir , the question is from your microprocessor lecture. why is that we are using a jump instruction (SJMP) to stop execution of program in 8051 rather than HLT as in the case of 8086 microprocessor?Is there any specific reason?
By:
Rahul R Nair
Date:
2012-11-26
The co-ordinator will post his answer
Question:
consider a computerwith 800M bytes of main memory & 128 K cache. The cache block is 4K.It uses direct mapped cache.How many different main memory blocks can map onto a given physical cacheblock ?
By:
MANU SIDDHARTHA
Date:
2013-01-26
The co-ordinator will post his answer
All Questions for this Course
Question:
what does word size mean? is it the size of CPU register and basic unit CPU works with ?
By:
zaved
Date:
2012-08-07
The co-ordinator will post his answer
Question:
Dear Sir, I am really enjoying your lectures. I find them clear, interesting and easy to understand. Could you please post your slides for all lectures - There is so much detail in your slides, it is difficult to get it all from watching. thanks, Sandy
By:
Sandy Clark
Date:
2012-08-27
The co-ordinator will post his answer
Question:
sir , can you explain the difference between latch and buffer?what does it mean by buffering and latching data?
By:
Rahul R Nair
Date:
2012-11-26
The co-ordinator will post his answer
Question:
sir , the question is from your microprocessor lecture. why is that we are using a jump instruction (SJMP) to stop execution of program in 8051 rather than HLT as in the case of 8086 microprocessor?Is there any specific reason?
By:
Rahul R Nair
Date:
2012-11-26
The co-ordinator will post his answer
Question:
consider a computerwith 800M bytes of main memory & 128 K cache. The cache block is 4K.It uses direct mapped cache.How many different main memory blocks can map onto a given physical cacheblock ?
By:
MANU SIDDHARTHA
Date:
2013-01-26
The co-ordinator will post his answer
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